1. Field of the Invention
The present invention is directed in general to data processing systems. In one aspect, the present invention relates to interrupt management in a data processing system that employs more than one partition.
2. Description of the Related Art
With data processing systems having multiple processors on a single integrated circuit, interrupt processing by a processor can be delayed when multiple processors are vying for access to the interrupt controller using busses which transfer the information between a processor and the memory mapped register in the interrupt controller. In addition, the interrupt controller in such multi-processor systems may include interrupt prioritization and blocking mechanisms that control interrupt priority blocking based solely on interrupt priority on a per-processor core basis to deliver the highest priority interrupt directly to the targeted processor core in a low-latency fashion. But such mechanisms do not address the interrupt management requirements of a partitioned/virtualized system or explicitly handle multi-threaded processors in data processing systems where the physical or hardware resources are divided into resource subsets or logical partitions which virtually operate as a separate computer, where each partition typically contains a processor core and other specified resources or specified portions of a resource such as memory within the system. These shortcomings add software complexity to interrupt management with a corresponding loss of system performance. Accordingly, a need exists for an improved system and methodology for managing interrupts in a data processing system that address various problems in the art where various limitations and disadvantages of conventional solutions and technologies will become apparent to one of skill in the art after reviewing the remainder of the present application with reference to the drawings and detailed description which follow, though it should be understood that this description of the related art section is not intended to serve as an admission that the described subject matter is prior art.